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    [1] Mitra, S. K. (2006), Digital signal processing: A computer based approach. 3rd edition. New York, NY: The McGraw-Hill.[2] Jovanovic-Dolecek, G.(2002), Introduction to multirate systems, Idea Group Publishing.[3] Oppenheim, A. V., & Schafer, R. W. (1989), Discrete-time signal processing,3rd edition. London: Prentice-Hall International.[4] Maloberti F. (2007), Data Converters, 1st edition, Springer International Edition.[5] Hogenauer, E. (1981). An economical Class of Digital Filters for Decimation and Interpolacion, IEEE Transactions Acoustic, Speech and Signal Processing, Vol.ASSP-29, (Apr.1981), pp.155-162.[6] Meyer-Baese U. (2007), Digital Signal Processing with Field Programmable Gate Arrays, 3rd edition, Springer International Edition.[7] Laddomada, M. (2007b), Comb-Based Decimation Filters for S? A/D Converters: Novel Schemes and Comparisons, IEEE Transactions on Signal Processing, vol.55, No.5, Part 1, pp 1769-1779.[8] Shahana T. K., Rekha K. (2007), Polyphase Implementation of Non-recursive Comb Decimators for Digma-Delta A/D Converters, Electron Devices and Solid State Circuits. IEEE Conference, Issue 20-22 Dec. 2007, pp. 825-828.[9] M. Abbas, O. Gustafsson, and L. Wanhammar, (2010) "Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology," IEEE Int. Conf. Green Circuits Syst., Shanghai, China, June 21-23, 2010.[10] Kim, S., et al., (2006), Design of CIC Roll-off Compensation Filter in a W-CDMA Digital Receiver, Digital Signal Processing, (Elsevier), Vol. 16, No.6, (Nove

    mber 2006), pp.846-854.ReferenciasPgina 129[11] Yeung, K. S. & Chan, S. S. (2004), The Design and Multiplier-less Realization of Software Radio Receivers with Reduced System Delay, IEEE Transactions on Circuits and Systems-1: Regular papers, Vol.51, No.12, (December 2004), pp.2444-2459.[12] Jovanovic Dolecek, G. & Mitra, S. K. (2008), Simple Method For Compensationof CIC Decimation Filter, Electronics Letters, vol.44, No.19, (Sempember 11, 2008), pp . 1270-1272.[13] Lo Presti, L. (2000), Efficient modified-sinc filters for sigma-delta A/D converters, IEEE Trans. Circuits Syst. II, Analog and Digital Signal Processing, vol.47, No.11, pp 1204-1213.

    [14] Jovanovic Dolecek G. and Laddomadda M. (2010), An Economical Class of DroopCompensated Generalized Comb Filters: Analysis and Design, IEEE Transactions on Circuits and Systems II: Express Brief, Vol.51, Issue 4, pp.275-279.[15] Jovanovic Dolecek, G. (2010a), Simplified Rotated SINC (RS) Filter for Sigma-Delta A/D Conversion, Proceedings of International Conference on green Circuitsand Systems ICGCS 2010, Shangai, China, (June 21-23 2010), pp.283-288.[16] Kwentus A. & Willson, Jr. A, (1997), Application of Filter Sharpening to Cascaded Integrator-Comb Decimation Filters, IEEE Transactions on Signal Processing,Vol.45, No.2, (February 1997), pp.457-467.[17] Kaiser, F. & Hamming, R.W. (1977), Sharpening the Response of a Symmetric Nonrecursive Filter by Multiple Use of the Same Filter, IEEE Transactions Acoustic,Speech and Signal Processing, Vol. 25, No. 5, (October 1977), pp. 415-422.[18] G. Jovanovic Dolecek and S. K. Mitra, Two-Stage CIC Based Decimator with Imp

    roved CharacteristicsIET Signal Processing, February 2010, vol.4, Issue 1, pp.22-29.[19] Saramki T., & Ritoniemi, T. (1997), A modified comb filter structure for decimation, Proc. IEEE International Symp. Circuits and Systems ISCAS, pp. 23532356.ReferenciasPgina 130[20] Abu-Al-Saud, W.A. & Stuber, G.L. (2006) Efficient sample rate conversion forsoftware radio systems. IEEE Transactions on Signal Processing, vol.54, No.3, pp. 932 939.[21] Laddomada, M., & Mondin, M. (2004), Decimation schemes for S? A/D converters

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    2/2

    based on Kaiser and Hamming sharpened filters, IEE Proceedings - Vision, Image and Signal Processing, vol.151, No.5, pp. 287-296.[22] Stephen, G., & Stewart, R.W. (2004), High-speed sharpening of decimating CICfilter, Electronics Letters, vol.40, No.21, pp. 1383-1384.[23] S. Brown and Z. Vranesic, Fundamentals of Digital Logic with VHDL design, Mc Graw Hill, USA, 2005.[24] K. Chang, Digital Systems Design with VHDL and Synthesis: An Integrated Approach. USA, IEEE Computer Society, 1999.[25] J. P. Deschamps, G. J. A. Bioul and G. D. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, John Wiley & Sons, USA, 2006.[26] A. Bartolo, B. D. Clymer, R. C. Burgess and J. P. Turnbull, An efficient method of FIR filtering based on impulse response rounding,IEEE Transactions on Signal Processing, vol. 46, No. 8, August 1998, pp. 2243 2248.[27] Hartley RI (1996), Subexpression sharing in filters using canonic signed digit multipliers, IEEE Trans. Circuits Syst. II, vol.43, No.10, pp.677688.[28] Park I-C and Kang H-J (2002), Digital filter synthesis based on an algorithmto generate all minimal signed digit representations, IEEE Trans. Computer-AidedDesign vol.21, No.12: pp. 15251529.[29] Dempster AG and Macleod MD (2004), Digital filter design using subexpressioneliminiation and all signed-digit representations, Proc. IEEE Int. Symp. on Circuits and Systems 3: pp. 169172.ReferenciasPgina 131[30] Yao C-Y, Chen H-H, Lin T-F, Chien C-J and Hsu C-T (2004), A novel common sub

    expression elimination method for synthesizing fixed-point FIR filters, IEEE Trans. Circuits Syst. I, vol.51, No.11, pp. 22152221.[31] Macleod MD and Dempster AG (2005), Multiplierless FIR filter design algorithms, IEEE Signal Processing Lett, vol.12, No.3, pp. 186189.[32] Wang Y and Roy K (2005), CSDC: A new complexity reduction technique for multiplierless implementation of digital FIR filters, IEEE Trans. Circuits Syst. I, vol.52, No.9, pp.18451853.[33] Flores P, Monteiro J and Costa E. (2005), An exact algorithm for the maximalsharing of partial terms in multiple constant multiplications, Proc. IEEE Intl.Conf. ComputerAided Design, San Jose, CA, pp. 1316, Nov. 610[34] Aboushady, H. et al. (2001), Efficient Polyphase Decomposition of Comb Decimation Filters in Sigma Delta Analog-to Digital Converters, IEEE Transactions onCircuits and Systems II, Vol.48, No.10, pp.898-905, (October 2001).

    [35] Martin K. (2000), Digital Integrated Circuit Design, New edition, Oxford University Press.[36] Weste N., Harris D. and Banerjee A., CMOS VLSI Design, 3rd edition, PearsonInternational Edition, 2005.